Applications are invited for the post of Junior Research Fellow (JRF)

Project Title : AI/ML based Floorplanning for Dynamic Function Exchange (DFX) in FPGA Architectures
Funding Agency : AMD
Project Location : BITS Pilani, Hyderabad Campus Duration : 1 Year (12 Months)
Position: Junior Research Fellow (JRF) Fellowship: Rs. 37,000
Essential Qualification: B.E/B.Tech in ECE/CSE
Desired Qualification: M.E/M.Tech in Microelectronics and VLSI/Embedded Systems/CSE or related specializations.
Desired Expertise: Strong understanding of RTL Design

Knowledge of Computer Architecture
Proficiency in Verilog
Experience with UVM, Vivado Tool/Cadence Tools/Synopsys Tools
Candidates having strong expertise in working with Machine Learning and Large Language Models may also be considered
Interested candidates should apply by filling out the form https://forms.gle/FM2mp3meBRx5ExDN9
and submit on or before 28.11.2025 (Friday)

Click here for more information.