follow us

Research Fellow (Reconfigurable SMART NIC)

Posted on : 14/09/2023

Applications are invited for ONE position of Research Fellow on project, “Development of FPGA-Based Dynamically Reconfigurable Smart-NIC with Accelerator IPs For Efficient Distributed Hardware Acceleration” under the supervision of Dr. Vipin Kizheppatt, Dr. Sai Sesha Chalapathi Gattupalli and Prof. Amalin Prince.

This position is applicable only to PhD aspirants. The candidates check the eligibility criteria and qualification process of the PhD program of BITS Pilani (


Scope of work

Essential Qualification

Desirable Qualification

This project aims to develop an FPGA-based Smart-NIC IP, which can be dynamically configured with different hardware accelerator cores for reducing communication and data processing overhead in distributed hardware acceleration. AI-based hardware accelerator would be developed as a test IP.

Post Graduate or Graduate degree in Electronics/ Communication/Instrumentation/ Computer Science/EEE or equivalent discipline from a recognized University.

Strong background in Digital design and hardware description language.

Knowledge of FPGA-based system design will be an added advantage


Fellowship: ₹37,000 - ₹42,000 per month (based on the year of PhD and performance)

Duration: As per BITS Pilani norms (

Place of work: BITS Pilani, Goa Campus, Goa

Benefits: You will be working on the state-of-the-art hardware and software development platforms. There will be ample opportunity to collaborate with overseas universities and industry. In addition to fellowship contingency fund will be provided to support research activities. Hostel or Married scholar accommodation could be provided subject to availability and per the institute's rules and regulations.




Application process: Please apply with CV and Cover letter (showing alignment and justification with the roles/responsibilities/requirements) using this form

Preliminary shortlisting will be based on resume and telephonic/audio-visual interview within a week of last date of application. For final interview, the candidate will be informed through e-mail for interview. No TA/DA will be provided in case of personal interview. For more details, please contact:


Dr. Vipin Kizheppatt

Department of EEE, Goa Campus

Email address:



more opportunities