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Academics

Integrated First Degree

B.E.(Chemical)
B.E.(Civil)
B.E.(Computer Science)
B.E.(Electrical and Electronics)
B.E. (Electronics and Computer )
B.E.(Electronics and Communication)
B.E.(Electronics and Instrumentation)
B.E.(Manufacturing Engineering)
B.E.(Mechanical)
BE Pharmaceutical Engineering
B.Pharm.(Pharmacy)
M.Sc.(Biological Sciences)
M.Sc.(Chemistry)
B.E. Environmental and Sustainability Engg.
M.Sc. Semiconductor and Nanoscience
M.Sc.(Economics)
M.Sc.(General Studies)
M. Sc. (Mathematics)
M.Sc.(Physics)
B. E. (Mathematics and Computing)

Higher Degree

M.E.(Electrical with specialization in Power Electronics and Drives)
M.E. Civil – Water Resource Engineering
MBA (Master of Business Administration)
MBA in Business Analytics
M.E.(Communication)
M.E. (Mechanical with specialization in Thermal Engineering)
M.E. Electronics & Control
M.E. M.Pharm
M.E.(Biotechnology)
M.E.(Chemical)
M.E.(Civil with specialization in Infrastructure Engineering and Management)
M.E.(Civil with specialization in Structural Engineering)
M.E.(Civil with specialization in Transportation Engineering)
M.E.(Computer Science)
M.E.(Design Engineering)
M.E.(Embedded Systems)
M.E.(Manufacturing Systems Engineering)
M.E.(Mechanical)
M.E(VLSI & Microelectronics)
M.E. Environmental engineering
M.E.(Sanitation Science, Technology and Management)
M.E.(Software Systems)
M.Pharm.(Pharmaceutical Chemistry)
M.Pharm.(Pharmaceutics)
M.Pharm.(Pharmacology)
M.Pharm.(Pharmacy)
M.Sc. General Studies – Communication and Media Studies Stream
Master in Public Health
MBA(Master of Business Administration In Business Analytics)

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Suman Bhowmik

Assistant Professor

Analog Circuits, Power Delivery of IC, SOC Design & Integration, VLSI technology
Office Cabin: CC-114, BITS Pilani Goa Campus, Goa- 403726, India
sumanb@goa.bits-pilani.ac.in
0832-2580-834
https://www.linkedin.com/in/dr-suman-bhowmik-a07a4a35/

About the Faculty :

Dr. Suman Bhowmik has joined BITS from the Semiconductor Industy. He has started his career at Intel as SOC Design Engineer where he spent more than 8 years. He has worked on cutting edge technologies and contributed significantly for successful Tape in/out of multiple SOCs.  He has been Lead Engineer for integration of Analog components in the SOCs. He has contributed in multiple cross domain works like Package Co-design, Signal & Power Integrity, System level Simulation, Clocking Methodology and Optimization etc. He has hands on experience on different kind of Analog simulations and modeling. He has worked in Intel Labs for designing Floating Point computing blocks using RTL design & synthesis. He has completed his PhD in the year of 2018 from National Institute of Technology, Agartala. In his PhD, he has proposed multiple techniques to reduce Power Supply Noise of Integrated Circuits by doing PDN (Power Delivery Network) analysis and designed PLL methodologies for low jitter clocking.

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