Our paper, “MISO-Write: Write-Cost-Aware CNN Scheduling and Flash Write Footprint-Guided Inference Optimization for Battery-less Devices,” developed from a B.Tech. Design Project, has been accepted at the 33rd IEEE International Conference on High Performance Computing, Data, and Analytics (HiPC 2026), a highly selective venue with an acceptance rate of approximately 20%. The work focuses on energy-efficient CNN inference for battery-less devices, optimizing CNN execution by considering flash-memory write costs and write footprints to improve the efficiency of intermittently powered computing systems.
September 2026 — New PhD Scholar Joined the Research Group
Sudharshan Mothukuru joined the Department of Computer Science, BITS Pilani, Dubai Campus as a PhD scholar under my supervision. His research focuses on Self-Powered Edge AI, intermittency-robust computing, and memory-aware accelerators for battery-less devices.
2026 — New Journal Publication
Our research work, “RA Scoreboarding: Return Address Stack Protection in RISC-V,” was published in the Journal of Systems Architecture. The work focuses on architectural mechanisms for strengthening return-address protection and improving the security of RISC-V processors.
2024 — RISC-V Hardware Security Research
Our work, “Strengthening Return Address Stack of Rocket Core Against Buffer Overflow Attacks,” was published in the SecITC 2024 proceedings by Springer. The research investigates architectural techniques for strengthening RISC-V processors against buffer-overflow attacks.
